[Question]How can I instance a riscv32ima simple CPU core using rocket-chip | 我怎样例化一个简单的riscv32ima的cpu核

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I want to instance a riscv32ima simple CPU core using rocket-chip. I have been search many website to find the way to do it, but everything goes out of my control.
An example of my Core io declaration:

class MyCore extends Module{
  val io = IO(new Bundle {
    val interrupt = Input(Bool())
    val master = AXI4Bundle(AXI4BundleParameters(addrBits = 32, dataBits = 32, idBits = ChipLinkParam.idBits))
    val slave = Flipped(AXI4Bundle(AXI4BundleParameters(addrBits = 32, dataBits = 32, idBits = ChipLinkParam.idBits)))
  })

// instance rocket-chip

}