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IcohedronIcohedron
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Split WaveActiveBallot tests into two tests to address new WARP bug (#712)
This PR splits off the WaveActiveBallot tests into two, with the `Out[3] = WaveActiveBallot(threadID.x % 2 == 1);` being its own test with the WARP-specific XFAIL associated with #711
1 parent e536eaf commit dcef1ec

6 files changed

+162
-18
lines changed

‎test/WaveOps/WaveActiveBallot.Modulo.Wave128.test‎

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#--- source.hlsl
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RWStructuredBuffer<uint4> Out : register(u1);
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[WaveSize(128)]
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[numthreads(128, 1, 1)]
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void main(uint3 threadID : SV_DispatchThreadID) {
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// We expect all resulting uint's bitmask to be
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// 0xAAAAAAAA
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Out[0] = WaveActiveBallot(threadID.x % 2 == 1);
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: Out
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Format: UInt32
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Stride: 4
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FillSize: 16
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- Name: ExpectedOut
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Format: UInt32
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Stride: 4
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Data: [2863311530, 2863311530, 2863311530, 2863311530]
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Results:
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- Result: Test
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: Out
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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...
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#--- end
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# REQUIRES: WaveSize_128
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# Bug: https://github.com/llvm/offload-test-suite/issues/711
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# XFAIL: WARP && Clang
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_6 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

‎test/WaveOps/WaveActiveBallot.Modulo.Wave32.test‎

Lines changed: 52 additions & 0 deletions
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@@ -0,0 +1,52 @@
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#--- source.hlsl
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RWStructuredBuffer<uint4> Out : register(u1);
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[WaveSize(32)]
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[numthreads(32, 1, 1)]
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void main(uint3 threadID : SV_DispatchThreadID) {
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// We expect the first resulting uint's bitmask to be
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// 0xAAAAAAAA
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Out[0] = WaveActiveBallot(threadID.x % 2 == 1);
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: Out
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Format: UInt32
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Stride: 4
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FillSize: 16
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- Name: ExpectedOut
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Format: UInt32
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Stride: 4
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Data: [2863311530, 0, 0, 0]
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Results:
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- Result: Test
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: Out
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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...
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#--- end
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# REQUIRES: WaveSize_32
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# Bug: https://github.com/llvm/offload-test-suite/issues/711
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# XFAIL: WARP && Clang
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_6 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

‎test/WaveOps/WaveActiveBallot.Modulo.Wave64.test‎

Lines changed: 52 additions & 0 deletions
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#--- source.hlsl
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RWStructuredBuffer<uint4> Out : register(u1);
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[WaveSize(64)]
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[numthreads(64, 1, 1)]
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void main(uint3 threadID : SV_DispatchThreadID) {
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// We expect the first and second resulting uint's bitmask to be
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// 0xAAAAAAAA
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Out[0] = WaveActiveBallot(threadID.x % 2 == 1);
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: Out
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Format: UInt32
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Stride: 4
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FillSize: 16
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- Name: ExpectedOut
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Format: UInt32
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Stride: 4
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Data: [2863311530, 2863311530, 0, 0]
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Results:
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- Result: Test
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: Out
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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...
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#--- end
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# REQUIRES: WaveSize_64
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# Bug: https://github.com/llvm/offload-test-suite/issues/711
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# XFAIL: WARP && Clang
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_6 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

‎test/WaveOps/WaveActiveBallot.Wave128.test‎

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -16,10 +16,6 @@ void main(uint3 threadID : SV_DispatchThreadID) {
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// We expect the resulting uint4 to be 4 0x00000000's
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Out[2] = WaveActiveBallot(false);
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// We expect all resulting uint's bitmask to be
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// 0xAAAAAAAA
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Out[3] = WaveActiveBallot(threadID.x % 2 == 1);
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}
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//--- pipeline.yaml
@@ -33,11 +29,11 @@ Buffers:
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- Name: Out
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Format: UInt32
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Stride: 4
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FillSize: 64
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FillSize: 48
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- Name: ExpectedOut
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Format: UInt32
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Stride: 4
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Data: [3221225471, 3221225471, 3221225471, 3221225471, 65535, 4294901760, 4294967040, 16777215, 0, 0, 0, 0, 2863311530, 2863311530, 2863311530, 2863311530]
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Data: [3221225471, 3221225471, 3221225471, 3221225471, 65535, 4294901760, 4294967040, 16777215, 0, 0, 0, 0]
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Results:
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- Result: Test
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Rule: BufferExact

‎test/WaveOps/WaveActiveBallot.Wave32.test‎

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Original file line numberDiff line numberDiff line change
@@ -14,10 +14,6 @@ void main(uint3 threadID : SV_DispatchThreadID) {
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// We expect the resulting uint4 to be 4 0x00000000's
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Out[2] = WaveActiveBallot(false);
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// We expect the first resulting uint's bitmask to be
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// 0xAAAAAAAA
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Out[3] = WaveActiveBallot(threadID.x % 2 == 1);
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}
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//--- pipeline.yaml
@@ -31,11 +27,11 @@ Buffers:
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- Name: Out
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Format: UInt32
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Stride: 4
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FillSize: 64
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FillSize: 48
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- Name: ExpectedOut
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Format: UInt32
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Stride: 4
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Data: [3221225471, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 0, 2863311530, 0, 0, 0]
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Data: [3221225471, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 0]
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Results:
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- Result: Test
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Rule: BufferExact

‎test/WaveOps/WaveActiveBallot.Wave64.test‎

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -14,10 +14,6 @@ void main(uint3 threadID : SV_DispatchThreadID) {
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// We expect the resulting uint4 to be 4 0x00000000's
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Out[2] = WaveActiveBallot(false);
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// We expect the first and second resulting uint's bitmask to be
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// 0xAAAAAAAA
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Out[3] = WaveActiveBallot(threadID.x % 2 == 1);
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}
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//--- pipeline.yaml
@@ -31,11 +27,11 @@ Buffers:
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- Name: Out
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Format: UInt32
3329
Stride: 4
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FillSize: 64
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FillSize: 48
3531
- Name: ExpectedOut
3632
Format: UInt32
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Stride: 4
38-
Data: [3221225471, 3221225471, 0, 0, 65535, 4294901760, 0, 0, 0, 0, 0, 0, 2863311530, 2863311530, 0, 0]
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Data: [3221225471, 3221225471, 0, 0, 65535, 4294901760, 0, 0, 0, 0, 0, 0]
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Results:
4036
- Result: Test
4137
Rule: BufferExact

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