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Pull requests: riscv-non-isa/riscv-arch-test
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ExceptionsZc python gen & compressed macros
#902
opened Feb 3, 2026 by
juliacygong
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12 tasks
[ACT4] Add support for register pairs and instructions with different types/coverpoints per XLEN
#900
opened Feb 2, 2026 by
jordancarlin
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feat: Add consistency check for compatible settings across multiple config files
#898
opened Feb 2, 2026 by
Amit-Matth
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2 of 12 tasks
feat: Implement FP register initialization in cross-combo tests
#873
opened Jan 27, 2026 by
yoursanonymous
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3 of 12 tasks
feat: implement minstret tracking, debug mode, and assembler alignment workaround
#872
opened Jan 27, 2026 by
Amit-Matth
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Updated InterruptsU.S based on the feedback received and cleaned it up
#840
opened Jan 8, 2026 by
SadhviNarayanan
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[CTG] fix: ensure coverage data is assigned for the first 100 entries
#773
opened Dec 10, 2025 by
hsuanyunhung
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Fix save area delta calculation with virtualization
#765
opened Dec 3, 2025 by
youngar
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1 of 12 tasks
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What’s not been updated in a month: updated:<2026-01-02.